This invention relates generally to semiconductor voltage reference devices.
As is known in the art, types of semiconductor voltage reference devices are so-called Zener or avalanche devices. Such devices have been made in monolithic integrated circuits using the emitter-base junction of an N-P-N transistor. In particular, a P-type conductivity base region is diffused through a surface of an N-type conductivity epitaxial layer formed on a P-type conductivity silicon wafer and an N-type conductivity emitter region is then diffused into the base region through the same surface. A P-N junction is then formed between the base-emitter regions, and when a proper voltage is applied across the junction the junction breaks down to establish the reference or Zener voltage. Unfortunately, this junction breakdown occurs along the surface of the silicon and, therefore, the precise breakdown or reference voltage is susceptible to surface effects, thereby affecting the accuracy of the reference voltage. Further, the breakdown voltage or reference voltage is generally relatively noisy and does not have relatively long-term stability, thereby limiting its effectiveness. Still further, because the surface is especially sensitive to contamination in an oxide layer generally formed on the surface, or at the silicon-silicon dioxide interface, short term stabilities and "turn on" drift may result in the reference voltage, thereby adversely affecting the usefulness of such a device in many applications.
A subsurface device has been suggested to reduce the surface effects described above. One such device is described in a paper entitled "Monolithic Temperature Stabilized Voltage Reference with 0.5 ppm/.degree. Drift" by Robert C. Dobkin, 1966 IEEE International Solid-State Circuits Conference, pgs. 108-109. As discussed therein, a deep P+ type conductivity region is diffused into an N-type conductivity silicon wafer, such diffusion then being covered by a standard base diffusion followed by an N+ type conductivity emitter diffusion which covers the deep P+ type conductivity diffusion. The diode is then broken down in the region where the dopant concentration is greatest, that is, across the junction formed between the P+ and N+ type conductivity regions. While such device may be useful in some applications, the use of diffusion processing in fabricating the base and deep P+ type conductivity regions requires careful control to achieve reference voltage variations of less than .+-.250 mV from run-to-run in a wafer production line thereby making such device impractical in many applications when such device is to be produced on a production basis.